1. Field of the Invention
The present invention relates to a synchronicity detection device in a communication terminal device, and specifically relates to a synchronicity detection device applied to and optimal for a cellular wireless communication system using a CDMA (Code Division Multiple Access) technique.
2. Description of the Related Art
The CDMA technique is a multiplexing technique using spread codes, is being investigated for application to cellular wireless communication systems as a wireless access technique for next generation mobile communications, and has already been implemented for some systems. In a cellular wireless communication system, an area in which communication services are provided is divided into cells with a desired size, a base station is installed in each cell as a fixed station, and a communication terminal system which is a mobile station makes a wireless connection with the base station for which the communication conditions are thought to be the most favorable.
FIG. 1 is a drawing indicating an example configuration of such a cellular wireless communication system; multiple base stations B1 to B7 are arranged at prescribed intervals, and cells C1 to C7 are comprised by an arrangement of base stations B1 to B7. A mobile telephone device M1 in the area of cell C1 is connected with the base station B1 through wireless communication.
In such a cellular wireless communication system, the act of searching for a base station for a mobile station to connect to is generally referred to as a cell search. With a CDMA type cellular wireless communication system, each base station uses identical frequencies, so when a cell search is performed, it is necessary pick up the timing of the spread code included in the reception signal.
A synchronicity detection device using a matched filter, for example, is used for processing to pick up a spread code with a CDMA technique. FIG. 2 is a configuration diagram indicating one example of a synchronicity detection device using conventional match filters. A reception signal obtained at an input terminal 901 is supplied to mixers 902 and 903, and after a carrier wave outputted by a carrier wave generator 904 is mixed in the reception output with the mixer 902 and a carrier wave outputted by the carrier wave generator 904 is phase shifted by É/2 with a É/2 phase converter 905, the mixing in the reception output occurs at the mixer 905, and detection is made of the orthogonal component and in-phase component included in the reception signal.
The detected in-phase component and orthogonal component are supplied to analog/digital converters 906 and 907, the digitally converted orthogonal component Dq and the in-phase component Di are obtained, and the data Di and Dq are provided to matched filters 910 and 911 respectively via band pass filters 908 and 909 respectively.
Matched filters 910 and 911 are circuits for detecting correlations with reception data of the CDMA technique spread with the prescribed spread code; spread code replicas Ci and Cq of the orthogonal component and in-phase component provided by a correlation coefficient generator 912 are supplied to the matched filters 910 and 911 respectively. Next, a correlation value Σm DiCi of the reception data Di and the replica code Ci, and the correlation value Σm DiCq of the reception data Di and the replica code Cq are obtained with the matched filter 910. A correlation value Σm DqCi of the reception data Dq and the replica code Ci and a correlation value Σm DqCq of the reception data Dq and the replica code Cq are obtained with the matched filter 911.
The correlation value Σm DiCi outputted by the matched filter 910 and the correlation value Σm DqCq outputted by the matched filter 911 are supplied to an adder 914, and a sum value of both correlation values (Σm DiCi+Σm DqCq) is obtained. The sum value is an inverse spread output of the in-phase component. The inverse spread output is supplied to a squaring circuit 916 where it is made into a real number and supplied to an adder 918.
The correlation value Σm DiCq outputted by the matched filter 910 and the correlation value Σm DqCi outputted by the matched filter 911 are supplied to an subtracter 915, and a value of the difference of both correlation values (Σm DqCi−Σm DiCq) is obtained. This difference value is the inverse spread output of the orthogonal component. The inverse spread output is supplied to a squaring circuit 917 where it is made into a real number and supplied to the adder 918.
At the adder 918, both supplied signals are added and a correlation energy E is found as a single system signal. The configuration of the matched filter is described in detail in the Embodiments mentioned below; the reception data is set to a shift register with a prescribed number of levels, the replica code which is anticipated to be included in the reception data and the reception data set to the shift register are multiplied, and if the reception data matches the spread code and the replica code, the local maximum value is obtained as the correlation output. Accordingly, if the code in which the reception data is being diffused matches the replica code, the final outputted correlation energy E indicates the maximum value, and timing to inversely spread the data can be obtained from the timing which indicates that maximum value.
FIG. 3 is a drawing indicating an example of a state of correlation detection with the synchronicity detection device indicated in FIG. 2. In this example, when the number of levels of the shift register equipped in a matched filter in the detection device is m, the correlation addition chip number becomes m, and the searchable range becomes m x n chips. The state of the shift register in the matched filter proceeds one chip at a time as indicated in FIG. 11A, and the m-bit correlation coefficient (in other words, the output of the correlation coefficient generator) inputted to the matched filter is always the same data as indicated in FIG. 3B.
Accordingly, the output of the matched filter (FIG. 3C) changes one chip at a time within the searchable range. Then, the correlation energy which is that output is written to an address with a different memory one chip at a time as indicated in FIG. 3D, so that the value written to the memory changes one chip at a time as indicated in FIG. 3E. When a value MFD(t) set to the matched filter with some timing and an output MFC(t) of the correlation coefficient generator match, an output OUT(t) of the matched filter is the maximum value in the searchable range, and the timing is detected as the standard timing. The timing of the maximum value exists only once in a spread code cycle.
For the synchronicity detection device using the matched filter mentioned above, only a correlation output for which the number of chips equivalent to the number of levels of the shift register of the matched filter is summed can be found. To obtain the timing of a spread code using pseudonoise with a long cycle, the correlation energy is detected using only a part of the spread code, but the local maximum value of the correlation energy can only be obtained once per spread code cycle.
With a CDMA type receiver, a synchronicity detection device using a sliding correlator is sometimes used. With such a synchronicity detection device using a sliding correlator, it is possible to obtain a correlation detection in which a larger number of chips is added with a small circuit scale compared to that when using a matched filter. However, with regard to the time required to find the correlation output for the timing of one spread code, the sliding correlator takes an M-chip quantity of time when the number of chips added to find the correlation is made M compared to a spread code one-chip interval of time for a matched filter. Because of this, in order to find and compare the correlation output compared to a temporally wide range of timings, a sliding correlator is not favorable as it takes too much time.